Real-Time Kernels: Cs/OS2 and Cs/OS3
Cs/OS2 and Cs/OS3 are preemptive, highly portable, and scalable real-time kernels.
Designed for ease of use on a huge number of CPU architectures, these kernels are a key component of the Cesium real-time operating system.
Key Features
ValuePortable. Offering unprecedented ease of use, Cs/OS kernels are delivered with complete source code and in-depth documentation. The Cs/OS kernels run on a huge number of processor architectures, with ports available for download. Scalable. The Cs/OS kernels allow for unlimited tasks and kernel objects. The kernels' memory footprint can be scaled down to contain only the features required for your application, typically 6–24 KBytes of code space and 2-5 KByte of data space. Reliable. The Cs/OS kernels include debugging features that reduce development time. The kernels provide extensive range checking, including checks for pointers passed in API calls, task-level services from ISRs, arguments within an allowable range, and valid specified options. Efficient. Cesium RTOS kernels also include valuable runtime statistics, making the internals of your application observable. Identify performance bottlenecks, and optimize power usage, early in your development cycle. |
HighlightsThe features of the Cs/OS kernels include:
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Specifications
Memory Footprint
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Task Management
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Kernel Services
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Feature Comparison
Which real-time kernel should you use? Cesium RTOS kernels meet different needs.
| Feature |
Cs/OS2 |
Cs/OS3 |
| Preemptive Multitasking | ✔ | ✔ |
| Built-in MPU Support | - | ✔ |
| Maximum number of tasks | 255 | Unlimited |
| Number of tasks at each priority level | 1 | Unlimited |
| Round robin scheduling | - | ✔ |
| Semaphores | ✔ | ✔ |
| Mutual exclusion semaphores | ✔ | ✔ (nestable) |
| Event flags | ✔ | ✔ |
| Message mailboxes | ✔ | - (not needed) |
| Message queues | ✔ | ✔ |
| Data Queues | - | ✔ |
| Fixed-sized memory management | ✔ | ✔ |
| Signal a task without requiring a semaphore | - | ✔ |
| Option to post without scheduling | - | ✔ |
| Send messages to a task without requiring a message queue | - | ✔ |
| Software timers | ✔ | ✔ |
| Task suspend/resume | ✔ | ✔ (nestable) |
| Deadlock prevention | ✔ | ✔ |
| Scalable | ✔ | ✔ |
| Code footprint | 6 to 26 Kbytes | 6 to 24 Kbytes |
| Data footprint | 1 Kbyte + | 2 Kbyte + |
| ROMable | ✔ | ✔ |
| Run-time configurable | - | ✔ |
| Compile-time configurable | ✔ | ✔ |
| ASCII names for each kernel object | ✔ | ✔ |
| Pend on multiple objects | ✔ | - |
| Task registers | ✔ | ✔ |
| Built-in performance measurements | Limited | Extensive |
| User-definable hook functions | ✔ | ✔ |
| Timestamps on posts | - | ✔ |
| Built-in kernel awareness support | ✔ | ✔ |
| Optimizable scheduler in assembly language | - | ✔ |
| Catch a task that returns | - | ✔ |
| Dynamic tick rate | - | ✔ |
| Source code available | ✔ | ✔ |
| Number of services | ~90 | ~70 |
| MISRA-C:1998 | ✔ (except 10 rules) | N/A |
| MISRA-C:2012 | - | ✔ (except 8 advisory and 8 required guidelines) |
Supported CPU Architectures
The following table lists CPU architectures for which Cs/OS ports are readily available. New ports can be written easily or adapted to your specific needs either by yourself or us.
| Manufacturer | CPU |
| Altera (Intel) | Nios II SoC FPGA (Cortex-A) |
| Analog Devices | Blackfin ADSP-CM4xx (Cortex-M) |
| ARM | ARM7, ARM9, ARM11 Cortex-A, Cortex-R, Cortex-M |
| Atmel (Microchip) | AVR, AVR32 SAM3, SAM4, SAM7, SAM9, SAMA5 (ARM Cortex-based) |
| Cypress Semiconductors (Infineon) | PSoC 4, PSoC 5 (Cortex-M) |
| EnSilica | eSi-RISC |
| Imagination Technologies | M14K |
| Infineon | XMC4000 (Cortex-M) |
| Microchip | PIC24, PIC32 |
| Microsemi | SmartFusion2 (Cortex-M) |
| Microsoft | Win32 |
| NXP | ColdFire HCS12 i.MX Kinetis (Cortex-M) LPC (Cortex-M) LPC (ARM7 / ARM9) MPC5xxx, MPC8xxx VFxxx (Cortex-A & Cortex-M) |
| Renesas | H8S 78K0R R32C RL78 RX100, RX200, RX600, RX700 RZ/A (Cortex-A), RZ/T1 (Cortex-R & Cortex-M) R-IN32 (Cortex-M) SuperH-2A V850E/2/S |
| RISC-V | RV32 |
| Silicon Labs | Gecko (Cortex-M) |
| ST Microelectronics | STM32F (Cortex-M) STM32L (Cortex-M) STM32H (Cortex-M) STM32U (Cortex-M) STR9 |
| Texas Instruments | C28x MSP430 (Cortex-M), MSP432 (Cortex-M) Hercules RM (Cortex-R), Hercules TMS570 (Cortex-R) |
| Xilinx | MicroBlaze Zynq-7000 (Cortex-A) Zynq Ultrascale+ MPSoC (Cortex-A & Cortex-R) |
You can also contact us for more information about supported platforms or port development.
